“Place and route” is a stage in the design of an integrated circuit (IC), which converts a circuit schematic, such as a netlist, into an actual layout that can be used in IC fabrication. In the placement step, the designer decides where to place the components of the circuit within the limited space available in the IC floorplan. The routing step then decides how to route conductors in order to make the necessary connections between the placed components.
In large-scale modern circuit designs, the placement and routing operations are usually performed by electronic design automation (EDA) tools, in accordance with instructions input by a specialist design engineer. For example, Synopsys, Inc. (Mountain View, Calif.), offers the IC Compiler™ place-and-route system, with capabilities for design planning, placement, clock tree synthesis, routing and optimization. Cadence Design Systems, Inc. (San Jose, Calif.), offers the Innovus™ Implementation System with similar capabilities. Engineers often use these EDA tools in conjunction with a library of predefined standard cells, which are provided by IC chip manufacturers and implement a range of predefined logic functions in the target technology of the IC under design.